This application is based upon and claims the benefit of priority from the prior Japanese Patent Application No. 11-303614, filed Oct. 26, 1999, the entire contents of which are incorporated herein by reference.
This invention relates to a method and apparatus for manufacturing a semiconductor element, and more particularly to a technique for simultaneously executing doping and activation of an impurity when depositing an aluminum alloy film on the reverse surface of a semiconductor element to thereby form a collector electrode.
A semiconductor element such as an IGBT (Insulated Gate Bipolar Transistor), a PMOS device, etc. has a structure in which a source/drain electrode is provided on one surface of a semiconductor substrate, and a collector electrode is provided on the other surface (reverse surface) of the substrate.
In the case of an IGBT, for example, it is necessary, when forming a collector electrode, to form a P-type layer, doped with B (boron) having its concentration controlled, in an N-type Si substrate adjacent to the collector electrode. The P-type layer is formed by doping the substrate with boron by ion implantation or chemical doping, then shifting the substrate to a diffusion furnace, and activating the doped boron.
Japanese Patent Application KOKAI Publication No. 5-326430, for example, discloses a chemical doping in which a wafer is placed in a chamber, then a reactive gas containing an impurity and an additive is supplied from the outside to the chamber having its interior kept in a vacuum state, and a laser beam is applied to the wafer in the vacuum atmosphere to dope the impurity.
Further, there is a case where a cheap raw wafer is used instead of an epitaxial grown wafer, an OSL, etc. In the case of using the raw wafer, it has a thickness of about 100 xcexcm in order to set the operation voltage at a practical level. When the wafer is as thick as 100 xcexcm, it is difficult to make a treatment on one surface of the wafer after the other surface thereof is processed. Therefore, in general, after its one surface is processed, the wafer is sliced thinner, and then its reverse surface is subjected to a treatment (ion implantation, annealing at about 500xc2x0 C.).
In the process using the raw wafer, the reverse side of the wafer is also made of a low impurity concentration N-type Si. To reduce the contact resistance of a reverse surface electrode, it is necessary to make the impurity concentration of the reverse Si surface high. Accordingly, after ions are implanted into the reverse surface, the wafer is subjected to a heat treatment executed at 500xc2x0 C. in a diffusion furnace, thereby activating the implanted ions and forming a high impurity concentration layer.
The above method, however, has the following problems. When employing ion implantation, an expensive ion implanting device is required, and a wafer may have a crystal defect.
Further, when employing chemical doping, a reactive gas containing an additive such as a catalyst is supplied from the outside into the vacuum chamber, and therefore a pure reaction does not occur.
In addition, to completely activate ions after they are implanted, it is necessary to execute annealing at about 1000xc2x0 C. for one hour. However, an N+-source, a P+-well, and a source/drain electrode are already formed in the surface of a substrate before annealing. Therefore, if annealing is executed, the surface electrode may be damaged, or its function may be degraded. This limits the temperature of heat treatment to 500xc2x0 C. or less.
For these reasons, the temperature of heat treatment executed on the reverse surface of the substrate cannot be increased to a sufficient activation enabling value. Accordingly, the P-type layer cannot sufficiently be formed and ion activation cannot sufficiently be executed. As a result, a high voltage is required for turning on the resultant transistor.
In addition, because of its structure, the diffusion furnace for executing ion activation cannot be used as the ion implanting device or as the vacuum chamber for reacting a reactive gas. Therefore, a wafer must be conveyed between the doping process and the activation process. If a thin wafer is used, it is very possible that the wafer will break while it is conveyed from the ion implanting device or the vacuum chamber to the diffusion furnace. This reduces the process yield.
It is the object of the invention to provide a semiconductor element manufacturing method and apparatus, in which when forming an electrode on the reverse surface of an Si chip, doping an Si wafer with an impurity and activation of the impurity are simultaneously executed using a laser beam, thereby realizing an ideal impurity concentration profile.
In the invention, an impurity is implanted into an Si chip and activated therein by placing the Si wafer on a table in a sealed container, and applying a laser beam to the Si wafer on the table through vapor of the impurity filled in the container.
Additional objects and advantages of the invention will be set forth in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention. The objects and advantages of the invention may be realized and obtained by means of the instrumentalities and combinations particularly pointed out hereinafter.